About

Welcome, this blog exists to document my efforts to learn about asynchronous logic design, and to help others do the same. I’ll be making theory, design, and implementation posts as I go, but if you have questions or suggestions, I’d love to hear them.

I am a computer Engineering Student at Iowa State University. I intend to pursue a PhD after graduation. During the school year, I TA the Embedded Systems I course at Iowa State. After taking the Digital Logic course, I have had the idea for this project in some form or another for a while. After a guided design of a synchronous MIPS microprocessor, I feel ready to take on an asynchronous one.

I expect the hazards to be much harder to deal with, especially access to the register file. Regardless, I will learn things and be a better engineer for it.

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